by kornalius » Aug 31, 2005 @ 12:21am
The mov instruction I have implemented is quite complex. It supports many varieties of addressing:
mov r0, r1
mov r0, 0x3AF
mov r0, [r1]
mov r0, [r1, 8]
mov [r0], r1
mov [r0, 8], 10
mov r0, [pplvar$]
mov [pplvar$], 10
mov [pplvar$, 8], 10
I made the mov and push quite complete, except the other operators are simpler, like add, sub ... For sure I had to add some opcodes underneath some of the mov'es addressing.
The push works transparently for ARM or Intel. On ARM is uses the r0-r3 before starting to push on the stack.