by Digby » Jan 21, 2003 @ 6:31am
Moose,
That's referring to the interface to the static StrataFlash memory onboard the chip and to external Flash/PC Card RAM, not to SDRAM.
If you go read the you'll find:
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2.2 SDRAM Interface
The processor supports an SDRAM interface at a maximum frequency of 100 MHz. The SDRAM
interface supports four 16-bit or 32-bit wide SDRAM partitions. Each partition is allocated
64 MBytes of the internal memory map. However, the actual size of each partition is dependent on
the particular SDRAM configuration used. The four partitions are divided into two partition pairs:
the 0/1 pair and the 2/3 pair. Both partitions within a pair (for example, partition 0 and partition 1)
must be identical in size and configuration; however, the two pairs can be different. For example,
the 0/1 pair can be 100 MHz SDRAM on a 32-bit data bus, while the 2/3 pair can be 50 MHz
SDRAM on a 16-bit data bus.
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Note that the PXA210 only has a 16-bit wide bus to SDRAM, but thank God no one has made a PocketPC design based off of that chip (at least that I know of).
Hope that explains things.